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Viewing Issues (1 - 50 / 1438) [ Print Reports ] [ CSV Export ]							[ First Prev 1 2 3 4 5 6 7 8 9 10 11 ... Next Last ]
	P	ID	Type	Category	Severity	Status	Updated	Summary

		0003017		[P1647 e Functional Verification Language]	minor	new	2010-03-11	Identity rules for named checks
		0002303	Errata	[SystemVerilog P1800] SV-EC	minor	new	2010-03-10	Champions feedback on Mantis item 1447
		0003016	Errata	[SystemVerilog P1800] SV-EC	block	new	2010-03-10	Master issue for SV-EC variable-sized array issues
		0001771	Errata	[SystemVerilog P1800] SV-EC	minor	new	2010-03-10	variable_lvalue BNF omits class_scope?
		0001701	Errata	[SystemVerilog P1800] SV-EC	minor	new	2010-03-10	capitalization scheme for scheduling region names
		0001585	Errata	[SystemVerilog P1800] SV-EC	minor	new	2010-03-10	BNF error on trigger of element of event array
		0001576	Errata	[SystemVerilog P1800] SV-EC	text	new	2010-03-10	In 5.15.1 unique and unique_index need to be reworded
		0001541	Errata	[SystemVerilog P1800] SV-EC	minor	new	2010-03-10	25.5.5, 25.9.2: example errors?
		0001527	Errata	[SystemVerilog P1800] SV-EC	major	new	2010-03-10	Constant function call can be to static class method
		0001293	Errata	[SystemVerilog P1800] SV-EC	major	new	2010-03-10	event region unclearness
		0000802	Clarification	[SystemVerilog P1800] SV-EC	block	assigned (shalom)	2010-03-10	Assigning too many elements to a queue
		0000975	Errata	[SystemVerilog P1800] SV-EC	feature	new	2010-03-10	5.9: "illegal for index_type to declare a type" is unclear
		0001350	Errata	[SystemVerilog P1800] SV-BC	major	new	2010-03-10	$ and $isunbounded issues
		0001572	Errata	[SystemVerilog P1800] SV-BC	text	new	2010-03-10	23.2.2.2: typos and unclearness
		0003015	Errata	[SystemVerilog P1800] SV-AC	text	new	2010-03-10	Examples of $fatal have bad arguments
		0000549	Errata	[SystemVerilog P1800] SV-EC	minor	new	2010-03-10	Issues with Section 15 on "Scheduling Semantics"
		0000261	Errata	[SystemVerilog P1800] SV-EC	feature	new	2010-03-10	randcase width rules inconsistent with Verilog
		0000138	Enhancement	[SystemVerilog P1800] SV-EC	feature	new	2010-03-10	Jeita 13: unclear behavior of default sequence
		0002900	Clarification	[SystemVerilog P1800] SV-EC	minor	new	2010-03-10	Associative array should consider the context of an lvalue to create an entry
		0002030	Errata	[SystemVerilog P1800] SV-EC	minor	new	2010-03-10	issues with covergroup/class new in BNF
		0002055	Errata	[SystemVerilog P1800] SV-EC	minor	new	2010-03-10	coverage bin distribution is not even
		0003014	Clarification	[SystemVerilog P1800] SV-EC	minor	new	2010-03-09	seeding of randcase and randsequence is missing from random stability
		0003013	Clarification	[SystemVerilog P1800] SV-EC	minor	new	2010-03-09	string type assignment to integral type - not explicitly illegal
		0003010	Clarification	[Power Aware P1801] 6.08 add_power_state	minor	assigned (Gary_Delp)	2010-03-08	add v1 < v2 ...
		0002768	Clarification	[Power Aware P1801] 5.04 Power states	major	editor (Gary_Delp)	2010-03-08	FAQ: associate SDF files with power states
		0002840	Errata	[SystemVerilog P1800] SV-EC	major	new	2010-03-08	Virtual interface datatype BNF incomplete
		0003012	Errata	[SystemVerilog P1800] SV-EC	minor	assigned (doug_warmke)	2010-03-08	Cleanups needed on clocking block text (0000890 revisited!)
		0003011	Errata	[SystemVerilog P1800] SV-CC	minor	assigned (doug_warmke)	2010-03-08	DPI import tf's need lifetime qualifier
		0002848	Errata	[SystemVerilog P1800] SV-EC	major	new	2010-03-05	Is it legal to assign an interface containing class declaration to a virtual interface
		0002983	Enhancement	[SystemVerilog P1800] SV-AC	feature	new	2010-03-03	SV features for next PAR (2010)
		0002953	Enhancement	[SystemVerilog P1800] SV-EC	feature	new	2010-03-03	Algorithmic generation of covergroup bin contents
		0003009	Errata	[Power Aware P1801] 6.40 set_isolation	minor	resolved	2010-03-02	Should skipping of nets be checked against supply set rather than just domains?
		0002599	Errata	[Power Aware P1801] 6.40 set_isolation	crash	feedback (Gary_Delp)	2010-03-02	Errata: Erroneous & conflicting -diff_supply_only semantics
		0002887	Clarification	[Power Aware P1801] 6.40 set_isolation	minor	feedback (Rolf_Lagerquist)	2010-03-02	Isolation Cell Issue
		0001919	Clarification	[Power Aware P1801] 1.03 Key characteristics of the Unified Power Format (UPF)	minor	editor (Gary_Delp)	2010-03-02	FAQ: Allow binding of power states to timing (and functional?) constraint sets
		0003008	Errata	[SystemVerilog P1800] SV-AC	trivial	new	2010-03-02	In $past BNF, "expression" should be "expression1"
		0001356	Enhancement	[SystemVerilog P1800] SV-EC	feature	new	2010-03-01	Multiple inheritance
		0001516	Errata	[SystemVerilog P1800] SV-EC	major	new	2010-03-01	arguments to randomize calls
		0002892	Clarification	[Power Aware P1801] 5.05 Power state name spaces	minor	assigned (Erich Marschner)	2010-03-01	FAQ: where do named power state tables exist in the namespace hierarchy and can they be referenced as a power state object?
		0003007	Errata	[SystemVerilog P1800] SV-EC	minor	new	2010-03-01	function prototype parentheses
		0002996	Enhancement	[SystemVerilog P1800] SV-EC	feature	assigned (Thomas R Alsop)	2010-03-01	Method overloading
		0002972	Enhancement	[SystemVerilog P1800] SV-EC	feature	new	2010-03-01	add class constructor/method, task/function overloading
		0003006	Clarification	[SystemVerilog P1800] SV-EC	minor	new	2010-02-28	LRM doesn't say explicitly what should happen if null pointer is randomized
		0002525	Enhancement	[SystemVerilog P1800] SV-BC	feature	assigned (shalom)	2010-02-25	Allow hierarchical references in $unit scope
		0002310	Errata	[SystemVerilog P1800] SV-BC	block	new	2010-02-24	Master issue for SV-BC Text Macro issues
		0001647	Enhancement	[SystemVerilog P1800] SV-AC	feature	new	2010-02-23	Type query functions
		0001479	Enhancement	[SystemVerilog P1800] SV-BC	feature	new	2010-02-23	Sysfunc to ask about signedness
		0000693	Enhancement	[SystemVerilog P1800] SV-BC	feature	new	2010-02-23	$identifier() system function
		0002465	Errata	[SystemVerilog P1800] SV-BC	block	new	2010-02-23	Master issue for SV-BC System task and function issues
		0003005	Enhancement	[SystemVerilog P1800] SV-BC	feature	new	2010-02-23	New severity task should be added $break, $halt
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