The Effects of Physical Design / Logic Synthesis Integration on Design Methodology

5/11/00


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Table of Contents

The Effects of Physical Design / Logic Synthesis Integration on Design Methodology

Skills for the new Millennium

Signoff change

A New RTL-GDSII Flow

Lock-in

Placement is the Key to Timing

Placement is the Key to Timing

Placement is the Key to Timing

Placement is the Key to Timing Closure!

Determine Chip Feasibility -(Example)

Determine Chip Feasibility

Determine Chip Feasibility

Determine Chip Feasibility

Different approaches to build timing closure systems

Requirements of a timing closure system

Author: Athena

Email: hill@synopsys.com