IEEE/DATC Electronic Design Processes 2000 Workshop - Program


April 26-28, 2000
http://www.eda.org/edps/edp00.html
Monterey Beach Hotel, Monterey, CA

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Wednesday, 4/26
8:00-8:30 - Breakfast
Speaker Title / Topic
8:30-10:00 - Welcome and keynote
Keynote speaker:
Ward Vercruysse, Senior CAD Architect at Sun Microsystems
Managing Complexity
10:30-12:00 - Session 1 - Distributed / Parallel Design Environments
Naresh Sehgal, Intel Impact of the Internet on e-Cad: A Field Survey
Bruce Winter, IBM (presented by David Hathaway) A Client-Server Based Architecture for Parallel Design Query and Analysis
12:00-1:00 - Lunch
1:00-3:15 - Session 2 - Verification Methodologies
Dennis Brophy, Mentor Graphics HDL Interoperability & IP-based System Verification
Peter van den Hamer, Philips Research Laboratories A System Simulation Framework (abstract)
3:45-6:00 - Session 3 - Network Impacts on EDA
Don Cottrell, SI2 ECIX: Electronic Component Information Exchange
Krishna Uppurli, Interweave Introduction to Interweave Technology - Enabling Global Design Flows
6:30 - Dinner
7:00 - Dinner Panel
Gary Smith, Dataquest
Howard Sachs, Fujitsu
What is the Role of the Tall, Thin Designer in Future Processes?
Thursday, 4/27
8:00-8:30 - Breakfast
Speaker Title / Topic
8:30-10:00 - Session 4 - Interoperability
Don Cottrell, SI2 Design Tool Plug and Play: What's it all about?

Moderator:John Darringer, IBM
Discussion: Integration and Interoperability Requirements for IC Design in the Year 2000
10:30-12:00 - Session 5 - Physical Design Methodologies
Ram Sunder, Pradeep Buddharaju, Khalil Siddiqui, Santhosh Pillai, Madhavi Tagare and Robert Farmer, National Semiconductor / Datamedia Physical Design Methodology for High Performance System-on-a-Chip Solutions for Multimedia Applications (abstract)
Nagbhushan Veerapaneni, Intel Software Architecture of the Nike CAD Design System
12:00-1:00 - Lunch
1:00-2:30 - Session 6 - API-Based Design Environments
Don Cottrell, SI2 Design API Coalition (DAPIC)
Joe Morrell, IBM (presented by David Hathaway) IBM's Integrated Data Model (IDM)
3:00-5:15 - Session 7 - Design Reuse and Management
Peter van den Hamer, Philips Research Flow-Based Design Management
Rick Cook, Rik Vigeland, Mentor Graphics Corporation Cable Design Reuse Across Hierarchical Boundaries
Shantanu Ganguly, Intel Design Convergence
6:30 - Dinner
Friday, 4/28
8:00-8:30 - Breakfast
Speaker Title / Topic
8:30-10:45 - Session 8
Effects of Physical Design / Logic Synthesis Integration on Design Methodology
Moderator: David Hathaway
Panelists:
Panel: Effects of Physical Design / Logic Synthesis Integration on Design Methodology
11:15-12:00 - Wrap-up Session
Moderators: David Hathaway and Margarida Jacome (workshop co-chairs) Discussion on future EDP workshops
  • Should EDP be expanded into a symposium (full papers, proceedings)?
12:00-1:00 - Lunch and adjourn